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Current Entry & Senior Level Openings

RTL Design Engineer – 0 to 8 yrs

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ASIC Verification Engineer – 0 to 8 yrs

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Synthesis & Timing Closure Engineer – 0 to 8 yrs

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Physical Design Engineer – 0 to 8 yrs

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Analog / Full custom Layout Engineer –0 to 8 yrs

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Memory Layout Engineer – 0 to 8 yrs

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Standard Cell Layout Engineer – 0 to 8 yrs

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Academic Institutions

Nanochip Solutions takes up turn key projects to design the labs, develop courseware, hire and screen faculty and work with technology vendors on your behalf to identify the right kind of hardware and software required to meet the needs. We can help you same lots of money. Talk to us and we will be happy to work with your institution. Our expertise is in designing and setting up industrial labs in the colleges, faculty training, technology and know-how transfer, AMC for SAS, resource planning and delivering courses on your campus in the areas of VLSI, ASIC and FPGA, PCB, PSoC, Robotics, RF and Embedded Systems. Our training and teaching methodologies incorporate Experiencial Learning (EL) techniques which increases the Employability Factor (EF) for its students.


We have the expertise to setup:

  • Centers of Excellence
  • Competency Centers
  • Nodal Centers
  • Innovation Centers

For details please write to us or email us at info@nanochipsolutions.com


Talent Incubation partner :